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As artificial intelligence (AI), machine learning (ML) and cloud computing expand, data centers are experiencing increasing strain to address the data explosion. These workloads demand faster, more efficient infrastructure to process and store data at unprecedented rates.
At the heart of this transformation is PCIe (Peripheral Component Interconnect Express), a key enabler of high-speed data transfer. Over time, PCIe has evolved to meet the rising performance demands of modern data centers, becoming indispensable in their architecture. But what does the future hold for PCIe, and how will it continue to shape the data center landscape?
Boosting Data Rates and Bandwidth Efficiency with PCIe
Every generation of PCIe has focused on increasing data transfer rates to support data-heavy workloads. For example, PCIe 6.0 offers a data rate of 64 GTps, doubling PCIe 5.0’s 32 GTps and significantly surpassing PCIe 2.0’s 5 GTps. These improvements have kept pace with AI/ML, cloud computing and big data analytics — where high bandwidth and low latency are critical.
A standout feature in PCIe 6.0 is its use of PAM4 (Pulse Amplitude Modulation with four levels).
Traditional NRZ (Non-Return-to-Zero) encoding transmits one bit per clock cycle, but PAM4 enables two bits per cycle by using four distinct voltage levels. This allows PCIe 6.0 to double data rates without increasing bandwidth consumption, which is essential as modern workloads demand efficiency without overwhelming existing infrastructure.
PAM4 Modulation: Paving the Way for Future PCIe Generations
As data demands rise, PAM4 modulation has become a foundational technology, not just in PCIe 6.0 but in future generations. Its ability to significantly increase data rates without expanding bandwidth makes it ideal for environments where bandwidth efficiency is crucial.
Applications such as high-performance computing (HPC) and AI/ML require massive datasets to be processed with minimal latency. PAM4 achieves this by doubling throughput, making it a natural fit for bandwidth-hungry workloads. However, this technology also brings challenges. PAM4’s multiple voltage levels are more noise-sensitive, making it increasingly difficult to maintain data accuracy at high speeds.
To address this, techniques like forward error correction (FEC) and channel equalizations are essential to ensure data integrity. Looking ahead, PAM4 will continue to play a key role in enabling faster data transfer as PCIe standards, such as PCIe 7.0, evolve.
Addressing Signal Integrity with Advanced Solutions
As PCIe data rates climb, signal integrity becomes a bigger challenge. High-frequency transmissions introduce issues such as insertion loss, return loss and inter-symbol interference (ISI), all of which degrade signal quality. These issues can lead to data errors and performance slowdowns, particularly at the higher speeds of PCIe 6.0 and beyond.
While PAM4 boosts data rates, it also lowers the signal-to-noise ratio (SNR), making systems more sensitive to noise and signal distortion. To ensure reliable data transmission, data centers rely on redrivers and retimers. Redrivers amplify and reshape signals to counteract attenuation, while retimers clean up jitter and regenerate signals, improving signal integrity at high speeds.
In addition to signal conditioning, cable solutions are crucial for maintaining signal quality. Active cables, which feature built-in amplifiers and equalizers, help maintain signal integrity over longer distances in large data centers. For shorter distances, passive cables offer a cost-effective alternative where signal degradation is less of a concern. Together, these solutions support high-speed data transfers without compromising performance.
Disaggregated Architectures and the Rise of AI/ML
Data centers are moving toward disaggregated architectures where compute, storage and networking resources are separated into modular components. This approach offers greater flexibility and scalability, enabling data centers to dynamically allocate resources based on workload demands. It also avoids the inefficiencies seen in traditional monolithic infrastructures, which often over-provision resources.
PCIe is a critical component in disaggregated architectures, providing the high-speed, low-latency connectivity needed to link compute, storage and networking components. Its scalability and flexibility make it an ideal solution for efficiently connecting distributed resources.
This is especially critical for AI and ML workloads, which are resource-intensive and demand massive data throughput with minimal latency. PCIe’s ability to deliver high bandwidth and low latency ensures that data centers can handle the increasing demands of AI/ML while supporting future technology expansions. By enabling seamless data transfer across disaggregated systems, PCIe positions data centers to manage increasingly complex workloads
Looking Ahead: PCIe 6.0 and Beyond
While PCIe 6.0’s 64 GT/s data rate is impressive, the future looks even faster. Next-generation standards like PCIe 7.0 are expected to push data transfer rates even further to meet the growing data demands of AI, ML and cloud computing.
PAM4 modulation will remain at the core of these advancements, enabling higher data throughput without increasing bandwidth needs. Industry-wide standardization, led by PCI-SIG, will ensure that new PCIe technologies integrate smoothly across systems. These standardization efforts are crucial for maintaining compatibility and scalability, allowing data centers to adopt PCIe advancements without major disruptions.
Molex Enables PCIe Evolution
As PCIe evolves, high-speed interconnects will be essential in supporting modern data centers. These interconnects provide the scalability and performance needed to handle growing workloads, driving efficient data processing and throughput.
As data centers push the boundaries of performance, Molex continues to be a leader in high-speed interconnects that enable modern PCIe standards, from Gen 5.0 to Gen 7.0. Molex offers a broad range of solutions to meet the evolving needs of data centers, ensuring seamless, high-speed data transfer with exceptional reliability.
NextStream Cable Assemblies: Supporting PCIe 6.0 and beyond, NextStream provides high-speed, low-latency connections between compute and AI servers, storage and networking components. With advanced signal integrity technology, these assemblies are designed to minimize latency and improve performance in disaggregated data centers. Additionally, NextStream cables offer support for active cable options — including internal re-drivers — to meet high insertion loss budget requirements in systems with thinner cable (32 AWG/34 AWG) requirements or greater signal degradation challenges.
NearStack PCIe Connector System: Optimized for PCIe 6.0, this low-profile connector system provides direct connections to enhance signal integrity and reduce latency, supporting data rates up to 64 Gbps. Its design improves thermal management, making it ideal for high-performance computing and AI applications.
PCIe 7.0 Readiness: Molex is already laying the groundwork for next-generation PCIe 7.0 standards, developing solutions that will deliver even higher data transfer rates while maintaining bandwidth efficiency through technologies like PAM4 modulation.
By leveraging Molex’s comprehensive portfolio of PCIe solutions, data center architects can ensure their infrastructure remains adaptable to the demands of tomorrow’s workloads, from AI and ML to cloud computing and big data analytics. Molex’s decades of engineering expertise and innovative product offerings make it a trusted partner in the PCIe evolution.
Dive Deeper: Keep exploring PCIe innovations by downloading our PCIe Resource Guide.
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